The present disclosure relates to semiconductor devices, and more particularly to a semiconductor device fabricated by stacking chips using a chip-on-chip technique.
With enhanced capabilities of digital televisions, recorders, etc., systems thereof have dealt with a dramatically increased amount of data. Therefore, semiconductor memories installed in these systems need not only increased capacities but also higher data transfer rates. For installation in a system requiring many semiconductor memories, a semiconductor device including a combination of a semiconductor logic circuit and a memory is under development. This semiconductor logic circuit includes a memory controller. A logic circuit and a memory are combined together as a system on chip (SoC), which integrates a semiconductor logic circuit chip and a memory into a single chip, or a system in package (SiP), where a logic circuit chip and a memory chip are stacked in a single package.
Currently, there is a tendency for systems with SiPs to increase in popularity because the cost of manufacturing of SiPs is relatively low. An SiP uses the chip-on-chip (CoC) technique for directly connecting chips by flip-chip bonding through micro bumps etc. to increase a data transfer rate between a semiconductor memory and a semiconductor logic circuit chip (see, e.g., Japanese Patent Publication No. 2010-141080).